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[Algorithm] FFT_4_Fixed_DIF_(OK)

Description: 基4的定点FFT算法，功能都在VC2008里验证过了，有不懂得可以跟我交流、讨论。-Fixed-point radix-4 FFT algorithm, features are verified in the VC2008 in, and there do not know how to communicate with me to discuss.
Platform: | Size: 218112 | Author: 傲天 | Hits:

[matlab] FFT_angle_A

Description: 利用fft来估计幅值和相位，打算和随机共振一起使用的-Use fft to estimate the magnitude and phase, intended to be used together and stochastic resonance
Platform: | Size: 1024 | Author: liuxianming | Hits:

[Other] FFT

Description: 基2时选FFT,此处取N=8,输入8位时域的值将输出傅立叶变换后的值-Yl 2:00 selected FFT, here take N = 8, the value of the input 8-bit time domain the output value after the Fourier transform
Platform: | Size: 12288 | Author: 耿浩翔 | Hits:

[matlab] 8PT-FFTUSING-DIF-FFT

Description: THIS THE PROGRAMME IN WHICH THE 8 POINT FFT OF THE SEQUENCE IS OBTAINED USING THE DIF FFT TECHNIQUE.-THIS IS THE PROGRAMME IN WHICH THE 8 POINT FFT OF THE SEQUENCE IS OBTAINED USING THE DIF FFT TECHNIQUE.
Platform: | Size: 9216 | Author: Rajeshwari | Hits:

[Multimedia Develop] Copy-of-VHDL-implementation-of-an-optimized-8

Description: Digital signal processing fft algorithm using FPGA development vhdl language
Platform: | Size: 114688 | Author: rayesh pai | Hits:

[Technology Management] Copy-of-VHDL-implementation-of-an-optimized-8-poi

Description: The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input datais a vector of 16 complex values
Platform: | Size: 119808 | Author: rayesh pai | Hits:

[VHDL-FPGA-Verilog] FFT

Description: VERILOG CODE FOR FLOATING POINT 8 POINT FFT
Platform: | Size: 16083968 | Author: gsp | Hits:

[VHDL-FPGA-Verilog] 8-point-pipeline-fft-by-verilog.pdf

Description: 简单的8位基2 流水 fft verilog-Simple 8 base 2 pipelined fft verilog
Platform: | Size: 220160 | Author: 张涛 | Hits:

[matlab] fft

Description: 计算线性卷积 b．分别用FFT计算它们的5点、6点、8点和10点圆周卷积。 实验程序 -Computing linear convolution b. FFT were used to calculate their 5:00, 6:00, 8:00 and 10:00 circular convolution. Experimental procedures
Platform: | Size: 1024 | Author: xiyue | Hits:

[Other] Simple-FFT-analyzer

Description: 设计一个 20Hz~20KHz 范围内的频谱分析仪（用计算机声卡）； 要求： 1） 用计算机声卡实时采集语音信号，并实时显示时域波形信号； 2） 可以从计算机中读取语音信号文件，并能够实时显示时域波形信号； 3） 实现对信号进行幅度上的放大、缩小显示，存储等； 4） 实时显示信号的频谱，信号的频谱分辨率可以进行设置； 5） 采用常见的低通、高通、带通、带阻（50Hz）滤波器对信号进行滤波，滤波器阶数可调，带宽可调，观察信号频谱的变化； 6） 对信号频谱进行非实时高分辨率分析； 7） 编制 GUI 用户界面，能够在用户界面上实现上述所有功能。 8） 其它功能可参考商用 FFT 分析仪添加； -Design a spectrum analyzer 20Hz ~ 20KHz range (with a computer sound card) Requirements: 1) with the computer s sound card real time voice signal acquisition and real-time display time-domain waveform signal 2) You can read the speech signal files from your computer, and the time-domain waveform signal can be displayed in real time 3) realize the magnitude of the signal amplification on the narrow display, storage, etc. 4) Real-time display spectral resolution signal spectrum, the signal can be set 5) using a common low pass, high pass, band pass, band stop (50Hz) signal filtering filters, filter order adjustable, adjustable bandwidth, observed changes in the signal spectrum 6) for non-real-time high-resolution signal spectrum analysis 7) the preparation of GUI user interface, to achieve all of the above functions in the user interface. 8) Other functions can be added with reference to commercial FFT analyzers
Platform: | Size: 620544 | Author: 李凯 | Hits:

[VHDL-FPGA-Verilog] fft

Description: 1024点，8位定点数的FFT计算，代码精炼，注释全面值得下载-1024 points, FFT calculation eight fixed-point code refining, comprehensive notes worth downloading
Platform: | Size: 30720 | Author: 徐展 | Hits:

[Algorithm] FFT

Description: 对比fftverilog实现一个8阶的改进串行FIR低通滤波器,输入数据位宽为12比特,经符号扩展-Comparison of fftverilog order to achieve an improvement of 8 serial FIR low pass filter, the input data width is 12 bits, sign extended
Platform: | Size: 24576 | Author: Hades | Hits:

[Other Embeded program] FFT

Description: FPGA下用VHDL实现的基2 cooley-tukey的8位FFT算法，在quartus ii环境下验证成功。-Under FPGA with base 2 cooley-tukey of 8 FFT algorithm VHDL realize, in quartus ii environment successfully verified.
Platform: | Size: 7577600 | Author: lht | Hits:

[MPI] FFT

Description: TMS320C6678 FFT源代码，TMS320C6678是TI公司推出的一款8核DSP，具有强大的并行处理能力，FFT代码底层使用汇编编写，使用C语言调用，模块化功能，便于使用-TMS320C6678 FFT source code, TMS320C6678 is TI has introduced an 8-core DSP, a powerful parallel processing capabilities, FFT underlying assembler code written in C language calling, modular functionality, ease of use
Platform: | Size: 41984 | Author: leiran | Hits:

[Picture Viewer] fft-bianhuan

Description: 包含了傅里叶变换的幅频特性和相频特性，其中包括8点、16点、32点的程序代码，运行后可直接产生图形。-Includes Fourier transform amplitude-frequency characteristics and phase-frequency characteristics, including 8:00, 16:00, 32 points of the program code can be run directly the graphics.
Platform: | Size: 5120 | Author: lingang | Hits:

[Other] 11

Description: DSP芯片TMS320F2XXX相关程序（FFT等例子）-some program about DSP TMS320F2XXX(FFT...)
Platform: | Size: 3316736 | Author: xiachun | Hits:

[VHDL-FPGA-Verilog] fft

Description: 实现功能：基8实现64点FFT处理器（进行两次8点FFT计算，采用基8进行64点） 详细说明：硬件结构包括六部分，分别为输入模块、8点FFT模块、乘法模块、顺序调整模块、输出模块和总控制模块。 其中，输入模块的主要功能是将串行输入的64个数据进行分类，分成8批次，每次8个输入到8点FFT模块中进行计算。 8点FFT模块：FFT是DFT的快速算法，当点数较大时，可以较大的减少DFT的运算量。常用的FFT算法主要有两种，分别为按时间抽选的FFT算法（DIT-FFT）和按频率抽选的FFT算法（DIF-FFT）。在我们的设计中，我们采用的是按频率抽选的8点FFT算法。 乘法模块：由于旋转因子的对称性，只需要产生8个常数因子即可。但这样会复用一些单元，从而影响运算速度，为了提高计算速度，我们分析时序情况，增加了一些单元，以实现输入数据到达之后就可以进行运算。 顺序调整模块是将第一级FFT出来的数据顺序进行调整并输出到下一级FFT模块中进行计算，数据的顺序调整情况类似于输入模块，每隔8个数取一个输出。 输出模块：由于第二级FFT模块输出数据顺序不符合实际要求，因此需要调整数据的顺序，从而使64个输出数据安装顺序串行输出，结构类似于输入模块，区别只是输入变为8个数据并行，输出为一个数据串行。-Function: base 8 implement 64-point FFT processor (twice 8:00 FFT calculation, using the base 8 of 64 points) Description: The hardware configuration consists of six parts, namely, an input module, 8-point FFT module, multiplication module, order adjustment module, the output module and total control module. Among them, the 64 data input module is the main function of the serial input classification, divided into eight lots, each 8 inputs and 8-point FFT module calculation. 8:00 FFT module: FFT is a fast algorithm for DFT, when a large number of points, you can greatly reduce the amount of computation of the DFT. FFT algorithm commonly used mainly two were decimated by time FFT algorithm (DIT-FFT) algorithms and FFT decimation in frequency (DIF-FFT). In our design, we have adopted is based on the frequency of lottery 8:00 FFT algorithm. Multiplication module: Since rotational symmetry factor, you only need to generate 8 constant factor. But it will reuse some of the units, which af
Platform: | Size: 32768 | Author: 李圣华 | Hits:

[matlab] fft

Description: this code is to find the FFT of 2 ,4 and 8 points
Platform: | Size: 1024 | Author: carolina | Hits:

[Other] biekeng_V8.8

Description: 采用波束成形技术的BER计算，感应双馈发电机系统的仿真，ofdm系统仿真 含16qam调制 fft 加窗 加cp等模块。- By applying the beam forming technology of BER Simulation of doubly fed induction generator system, ofdm system simulation including 16qam modulation fft windowing modules plus cp.
Platform: | Size: 4096 | Author: gaipei | Hits:

[assembly language] uhd_fft

Description: fft傅里叶变换 python语言 uhd_fft.py-fft python
Platform: | Size: 3072 | Author: 张瑞宁 | Hits:
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